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| ltc1199lis8资料 | |
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ltc1199lis8 |
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file size : 116 kb
manufacturer:linear description: synchronous circuitry allows for precise cycle control triggered by a positive edge clock transition. synchronous signals include : all addresses, all data inputs, all chip enables (e1#, e2, e3#), address advance/load (adv), clock enable (cke#), byte write enables (bwa#, bwb#, bwc#, bwd#) and read/write (w#). write operations are controlled by the four byte write enables (bwa# - bwd#) and read/write(w#) inputs. all writes are conducted with on-chip synchronous self- timed write circuitry. asynchronous inputs include output enable (g#), clock (clk) and snooze enable (zz). the high input of zz pin puts the sram in the power-down state.the linear burst order (lbo#) is dc operated pin. lbo# pin will allow the choice of either an interleaved burst, or a linear burst. all read, write and deselect cycles are initiated by the adv low input. subsequent burst address can be internally generated as controlled by the adv high input. |
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| 1pcs | 100pcs | 1k | 10k | ||
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型 号：ltc1199lis8 厂 家：linear 封 装：0611 批 号：smd/dip 数 量：2445 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：林浩/林妮 |
| 电 话：0755-82532799/82532766/83989559 |
| 手 机：13510168121/13725556003 |
| qq：496982847/351622092 |
| msn：linearic@hotmail.com |
| 传 真：0755-82532766 |
| email：maxim_zi@126.com |
| 公司地址： 深圳市福田区佳和大厦b座1802室 门市部：华强广场 q2a114展销柜 |
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