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| ltc1318csw资料 | |
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ltc1318csw |
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file size : 116 kb
manufacturer:linear description:high-speed adc family companion chip selectable 1:2 or 1:4 dmux ratio power consumption: 2.6w lvds compatible differential data and clock inputs (100ω terminated) lvds compatible differential data and data ready outputs staggered or simultaneous data outputs c 11th bit = ports a, b, c and d clock in staggered mode selectable active edge for input and output clocks: c only rising: clk and dr mode c rising and falling: clk/2 and dr/2 mode fine tuning of input clock path delay c compensation of external data and clock path misalignment and skews c once tuned, setting is valid over full operating frequency and over full specified temperature range additional 11th bit (example: for out-of-range bit) built-in self test (bist) stand-alone tunable delay cell power supplies: vccd = 3.3v (digital), vplusd = 2.5v (outputs) power consumption reduction mode: 1.1w ebga240 package |
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| 1pcs | 100pcs | 1k | 10k | ||
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型 号：ltc1318csw 厂 家：linear 封 装：0510 批 号：smd 数 量：3865 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：林浩/林妮 |
| 电 话：0755-82532799/82532766/83989559 |
| 手 机：13510168121/13725556003 |
| qq：496982847/351622092 |
| msn：linearic@hotmail.com |
| 传 真：0755-82532766 |
| email：maxim_zi@126.com |
| 公司地址： 深圳市福田区佳和大厦b座1802室 门市部：华强广场 q2a114展销柜 |
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