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sc802aimltrt资料
sc802aimltrt
 
file size : 116 kb
manufacturer:
description:serial clock (scl). this input signal is used to strobe all data in and out of the device. in applica- tions where this signal is used by slave devices to synchronize the bus to a slower clock, the bus master must have an open drain output, and a pull-up resistor can be connected from serial clock (scl) to vcc. (figure 5. indicates how the value of the pull-up resistor can be calculated). in most applications, though, this method of synchro- nization is not employed, and so the pull-up resis- tor is not necessary, provided that the bus master has a push-pull (rather than open drain) output. serial data (sda). this bi-directional signal is used to transfer data in or out of the device. it is an open drain output that may be wire-ored with other open drain or open collector signals on the bus. a pull up resistor must be connected from se- rial data (sda) to vcc. (figure 5. indicates how the value of the pull-up resistor can be calculated). chip enable (e0, e1, e2). these input signals are used to set the value that is to be looked for on the three least significant bits (b3, b2, b1) of the 7- bit device select code. these inputs must be tied to vcc or vss, to establish the device select code as shown in figure 4.
 
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  1pcs 100pcs 1k 10k  
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型 号:sc802aimltrt
厂 家:
封 装:0528
批 号:dip/sop
数 量:10000
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